Papers and Pubilcations

Journal Papers

1. H. Venkatram, J. Guerber, M. Gande, and U. Moon, . "Detection and correction meathods for single event effects in analog to digital converters," IEEE Trans. Circuits Syst. I, Fundam. Theory Appl., vol. 60, no. 12, pp. 3163-3172 , Dec. 2013.
2. J. Guerber, H. Venkatram, M. Gande, and U. Moon, . "Ternary R2R DAC design for improved energy efficiency" Electron. Lett., vol. 49, Feb. 28, 2013.
3. J. Guerber, H. Venkatram, M. Gande, A. Waters, and U. Moon, . "A 10-b ternary SAR ADC with quantization time information utilization" IEEE J. Solid-State Circuits, vol. 47, no. 11, pp. 1900-1910, Nov. 2012.
4. J. Guerber, M. Gande, and U. Moon, . "The analysis and application of redundant multistage ADC resolution improvements though PDF residue shaping," IEEE Trans. Circuits Syst. I, Fundam. Theory Appl., vol. 59, no. 8, pp. 1733-1742, Aug. 2012.
5. V. Hariprasath, J. Guerber, S.-H. Lee, U. Moon,. "Merged capacitor switching based SAR ADC with highest switching energy-efficiency," Electron. Lett., vol. 46, pp. 620-621, Apr. 2010.

Conference Proceedings

1. M. Gande, H. Lee, H. Venkatram, J. Guerber, and U. Moon, "Blind Background Calibration of Harmonic Distortion Based on Selective Sampling," IEEE Custom Int. Circuits Conf., To Appear Sept 2013.
2. M. Gande, J. Guerber, and U. Moon, "Analysis of Back-End Flash in a 1.5b/Stage Pipelined ADC," Proc. of IEEE Int. Sym. On Circuits and Systems, ISCAS, May 2013.
3. J. Guerber, H. Venkatram, T. Oh, and U. Moon, "Enhanced SAR ADC energy efficiency from the early rest merged capacitor switching algorithm," Proc. of IEEE Int. Sym. On Circuits and Systems, ISCAS, pp. 2361-2364, May 2012. (Slides)
4. T. Oh, H. Venkatram, J. Guerber and U. Moon, "Correlated jitter sampling for jitter cancelation in pipelined TDC," Proc. of IEEE Int. Sym. On Circuits and Systems, ISCAS, pp. 810-813, May 2012.
5. H. Venkatram, T. Oh, J. Guerber and U. Moon, "Class A+ amplifier with controlled positive feedback for discrete-time signal processing circuits," Proc. of IEEE Int. Sym. On Circuits and Systems, ISCAS, pp. 428-431, May 2012.
6. J. Guerber, M. Gande, H. Venkatram, A. Waters, and U. Moon, "A 10b ternary SAR ADC with decision time quantization based redundancy" Proc. IEEE Asian Solid-State Circuits Conf., pp. 63-65, Nov. 2011. (Slides)

Patents

PhD Thesis

1. J. Guerber, "Time and Statistical Information Utilization in High Efficiency Sub-Micron CMOS Successive Approximation Analog to Digital Converters" Oregon State Univeristy, Department of Electrical Engineering and Computer Science Dec. 2012. (Slides)

Affiliations and Awards

1. IEEE Member, Student Memeber (2005-Present)
2. IEEE Solid State Circuits Society Member, Memeber (2011-Present)
3. HKN Member, Member (2006-Present), Chapter Vice-President (2007-2008)
4. Analog Devices Outstanding Student Designer Award, 2012
5. TECHCON Best in Session Award, Circuit Design 2012

School Reserch Work (Non-Peer Reviewed)

1. J. Guerber "Design and Analysis of a self biased flicker noise cancelling CMOS direct conversion mixer" Oregon State University EECS, RFIC Design (ECE 621), Mar. 2010.
2. J. Guerber "Design of an 2.4GHz CMOS low noise amplifier" Oregon State University EECS, RFIC Design (ECE 621), Feb. 2010.
3. P. Ke and J. Guerber "A 1.3V low power divide by 4 PLL design with output range of 0.5GHz-1.5GHz" Oregon State University EECS, PLL Design (ECE 599), Dec. 2009.
4. J. Guerber "Design of an 18-bit, 20kHZ audio delta-sigma analog to digital converter" Oregon State University EECS, ADC Design (ECE 627), Jun. 2009.
5. B. Drost and J. Guerber "Design and charicterization of a 10Gb/s, Tx/Rx serial link in 90nm CMOS" Oregon State University EECS, Serial Link ICs (ECE 599), Jun. 2009.
6. B. Drost, J. Guerber, and B. Yang "Oscilloscope on a chip" Oregon State University EECS, Senior Design (ECE 463), Jun. 2007.